AI & Chip Design Intern (Summer 2026)

Cadence Design Systems • San Jose, CA

1d

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. AI & Chip Design Intern (Summer 2026) As an intern, you will join a dynamic team of software developers and research‑minded engineers shaping the future of AI‑accelerated chip design and verification. You will be part of the SVG (System Verification Group), whose charter is to develop state‑of‑the‑art EDA software and hardware platforms used for high‑performance functional verification of advanced integrated circuits. Our products include industry‑leading simulation (Xcelium), formal (Jasper), hardware acceleration (Palladium), FPGA prototyping (Protium), and embedded software bring‑up environments (Helium). Increasingly, these next‑generation verification systems incorporate AI, automation, and advanced data‑driven workflows - and that’s where you come in! What You’ll Work On You will contribute to applied research and engineering projects that sit at the intersection of AI/ML, systems, and chip design. Possible project areas include: Building intelligent automation and LLM-based agents that assist chip designers and verification engineers Developing evaluation pipelines from large-scale verification data Contributing to R&D efforts that apply machine learning to simulation, acceleration, or design‑space exploration Building Python and cloud‑native tooling for verification workflows Exploring open‑source software, IDE plugins, or developer‑productivity tools for chip‑design engineers Building high-quality user interfaces for human-agent collaboration Throughout the internship, you’ll gain essential engineering skills including research exploration, requirements definition, project planning, coding, debugging, testing, and documentation. You will work closely with a dedicated mentor and present your work at the end of the summer. You will also get to interact with customers. You will also participate in immersive training on Cadence’s core verification technologies and join fun events with other interns.

Requirements

• Currently pursuing a BS or MS Computer Science, Computer Engineering, Electrical Engineering, or a related field
• Strong proficiency in Python
• Solid understanding of data structures, algorithms, and software engineering fundamentals
• Demonstrated research or engineering background in one of the following: AI/ML (fundamental or applied), Chip design or computer architecture, Systems and software engineering
• Good communication skills and the ability to work collaboratively
• Interest in developing AI‑enabled workflows for chip design or verification

Nice To Haves

• Prior experience building LLM-powered agents for complex problems
• Familiarity with chip‑design concepts or verification (through coursework or projects)
• Exposure to cloud services, distributed systems, or containerized environments
• Experience at an early‑stage startup or in fast‑moving research environments
• Experience developing IDE extensions or plugins (e.g., VS Code)
• Strong analytical and problem‑solving skills
• Interest in learning both modern EDA technologies and cutting-edge applied AI

Responsibilities

• Building intelligent automation and LLM-based agents that assist chip designers and verification engineers
• Developing evaluation pipelines from large-scale verification data
• Contributing to R&D efforts that apply machine learning to simulation, acceleration, or design‑space exploration
• Building Python and cloud‑native tooling for verification workflows
• Exploring open‑source software, IDE plugins, or developer‑productivity tools for chip‑design engineers
• Building high-quality user interfaces for human-agent collaboration

What This Job Offers

• Career Level: Intern