Design Engineer- Sensors

QualcommSanta Clara, CA
1d

About The Position

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Requirements

  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field.

Nice To Haves

  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • 2+ years of experience with architecture and design tools.
  • 2+ years of experience with scripting tools and programming languages.
  • 2+ years of experience with design verification methods.

Responsibilities

  • Applies ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
  • Creates architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
  • Collaborates across teams (e.g., software architecture, hardware architecture) to develop and execute an implementation strategy that meets system requirements and customer needs.
  • Evaluates all aspects of process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
  • Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of an individual block/SoC or IC Package.
  • Writes detailed technical documentation for EDA/IP/ASIC projects.
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service