DFT Design Engineer

Intel Corporation

1d • Hybrid

About The Position

Perfect Opportunity for Career Growth: This role is ideally suited for recent graduates and early-career professionals passionate about building expertise in Design for Test (DFT). No previous DFT experience is required – we're seeking motivated individuals with a genuine interest in evolving their careers in this specialized field. The Role and Impact: As a DFT Design Engineer, you will play a vital role in shaping the quality and performance of Intel's silicon products. You will contribute to the development of cutting-edge technologies by designing and verifying robust Design for Test (DFT) features that ensure manufacturability and reliability. Your work will directly impact Intel's ability to deliver high-quality products to market quickly, meeting both performance and quality objectives. This position offers the opportunity to collaborate with cross-functional teams, influence design methodologies, and drive innovation in test strategies for SoC and functional IP blocks.

Requirements

• Bachelor's degree in Computer or Electrical Engineering, or a related field with no prior experience required.
• Interest in DFT as a career
• This position is based in Fort Collins, Colorado and requires on-site presence 4 days per week at our office location.

Nice To Haves

• Familiarity with test architecture including SCAN, MBIST, BSCAN, and TAP.
• Familiarity with RTL coding, DFT techniques, and timing closure methods.
• Experience with design tools and methodologies such as ATPG and coverage analysis.
• Experience configuring EDT setups and resolving stuck-at and at-speed test scenarios.
• Proficient programming skills in TCL, Python, Perl, and/or C++.
• Knowledge of GLS for test scenario resolution and ATPG coverage analysis.
• Strong communication and collaboration skills, with a focus on teamwork across diverse engineering groups.

Responsibilities

• Develop logic design, register transfer level (RTL) coding, and implement DFT architectures including SCAN, MBIST, BSCAN, and TAP.
• Collaborate in the definition of architecture and microarchitecture features for DFT blocks and subsystems.
• Optimize logic to achieve power, performance, area, timing, test coverage, and defect per million (DPM) goals.
• Write and generate RTL and structural code for DFT integration, ensuring design integrity for physical implementation.
• Review and execute verification plans to ensure design features meet architecture specifications.
• Resolve RTL test failures and implement corrective measures to ensure feature correctness.
• Support SoC customers for successful integration of DFT blocks, contributing to high-quality IP and SoC designs.
• Develop high-volume manufacturing (HVM) test content for rapid bring-up and production deployment on automatic test equipment (ATE).
• Collaborate with post-silicon and manufacturing teams to verify features in silicon and support debugging requirements.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel.

What This Job Offers

• Career Level: Entry Level
• Number of Employees: 5,001-10,000 employees