Director of Design Verification

AlteraSan Jose, CA
5d

About The Position

About Altera For decades, Altera has been at the forefront of programmable logic technology, delivering industry-leading FPGA, SoC FPGA, and heterogeneous computing solutions. Our technologies enable customers across data center, automotive, aerospace & defense, communications, and industrial markets to solve some of the world’s most complex engineering challenges. At Altera, we foster a culture of innovation, technical excellence, and collaboration while building products that shape the future of computing. About the Role Altera is seeking a Director of Design Verification to lead and scale design verification efforts across multiple FPGA and SoC programs. This role is responsible for defining verification strategy, driving best-in-class verification methodologies, and partnering closely with Design, Architecture, Product, and Silicon teams to ensure first-pass silicon success. The ideal candidate is a seasoned technical leader with deep verification expertise, strong people leadership skills, and a track record of delivering complex silicon on schedule.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field and 15+ years of experience in the following:
  • 15+ years of hands-on Design Verification experience in complex ASIC, SoC, or FPGA development environments
  • 7+ years of technical leadership or people management experience leading verification teams
  • Deep expertise in SystemVerilog, UVM, constrained-random verification, functional coverage, and assertions
  • Proven experience verifying large-scale, complex digital designs and IPs
  • Strong understanding of digital design, microarchitecture, and system-level integration
  • Demonstrated ability to deliver high-quality silicon on aggressive schedules

Nice To Haves

  • Master’s degree or PhD in Electrical Engineering, Computer Engineering, or a related field
  • Experience leading verification for FPGA, SoC FPGA, or heterogeneous compute architectures
  • Hands-on experience with formal verification, emulation, and post-silicon validation correlation
  • Familiarity with power-aware verification, low-power methodologies, and performance validation
  • Experience scaling verification teams and processes in a fast-paced, multi-project environment
  • Strong cross-functional communication skills and executive-level influence

Responsibilities

  • Lead, mentor, and grow multiple Design Verification teams supporting FPGA and SoC product development
  • Define and drive verification strategy, methodology, and best practices across the organization
  • Oversee verification planning, execution, coverage, and sign-off for complex silicon programs
  • Partner closely with Design, Architecture, Emulation, Validation, and Software teams to ensure end-to-end quality
  • Drive adoption and advancement of industry-standard and proprietary verification methodologies (UVM, constrained random, formal, emulation, etc.)
  • Establish metrics, dashboards, and quality gates to track verification progress and risk
  • Influence product and architectural decisions through early verification engagement
  • Manage resource planning, staffing, and prioritization across multiple programs
  • Champion continuous improvement, automation, and innovation in verification flows and infrastructure
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