FPGA Implementation Tools Software Engineer

Advanced Micro Devices, Inc•San Jose, CA

17h

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The role: AMD is looking for a specialized senior software engineer to create innovative solutions for FPGA-based emulation and prototyping platforms. You will be part of a core team that works closely with industry leading partners on improving FPGA compilation for emulation and prototyping platform designs. The person: The ideal candidate should be passionate about creating a better FPGA compile solution for AMD’s partners in the emulation and prototyping industry. Must be able to work on a range of different problems. Must be able to communicate effectively and work with different teams across AMD.

Requirements

This role is not eligible for visa sponsorship.

Nice To Haves

Strong object-oriented programming experience (C++ preferred)
Hands-on experience with FPGA implementation tools such as Xilinx Vivado or Intel Quartus
Solid understanding of FPGA place-and-route algorithms and optimization techniques
Experience with timing closure methodologies and performance tuning
Ability to communicate technical findings clearly across engineering and partner teams

Responsibilities

Work with AMD’s partners to understand the limitations in current AMD place and route solutions for emulation and prototyping FPGA designs.
Triage designs from AMD’s partners to find root cause of timing closure failures, high compile time and memory usage.
Apply knowledge of FPGA place and route algorithms to identify areas of improvement for AMD tools.
Work closely with R&D team to implement tool improvements that help AMD’s partners achieve their design closure, compile time and memory goals.
Work with AMD’s architecture team to develop tools support for next generation FPGAs.