Logic Design Engineer

Intel Corporation • Waltham, MA

1d • Hybrid

About The Position

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Responsibilities include: Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration and verification of the IP block. Drives quality assurance compliance for smooth IPSoC handoff. Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelors & 4+ years or Masters & 3+ years in Electrical Engineering, Computer Engineering or Computer Science or equivalent, with the years of relevant experience in the skills below: Program/project management Digital IP development flow and methodology from concept to production Preferred Skills: 5+ Years of hands on experience in Intel IP/SoC /Platform programs, definition, planning and/or PLC management for IPs/SoCs/Platforms Proficiency at using key Intel Systems of Record like HSD-ES, Carbon, Atlas and PVIM Possess excellent working knowledge of Microsoft Project, Excel and PowerPoint Experience working with ecosystem partners, suppliers and EDA vendors in putting together SoWs, and NDAs is desirable Working knowledge of Jira is a plus Proven leadership, Proactive and highly self-motivated; good critical thinking skills and strong attention to detail Experience in working with senior, cross function/cross organization teams Strong communicator to manage a complex set of stakeholders - across multiple organizational levels and geographies Strong financial acumen and analytical skills, along with experience in driving efficiencies across an organization Innovation/change agent

Requirements

• Bachelors & 4+ years or Masters & 3+ years in Electrical Engineering, Computer Engineering or Computer Science or equivalent, with the years of relevant experience in the skills below:
• Program/project management
• Digital IP development flow and methodology from concept to production

Nice To Haves

• 5+ Years of hands on experience in Intel IP/SoC /Platform programs, definition, planning and/or PLC management for IPs/SoCs/Platforms
• Proficiency at using key Intel Systems of Record like HSD-ES, Carbon, Atlas and PVIM
• Possess excellent working knowledge of Microsoft Project, Excel and PowerPoint
• Experience working with ecosystem partners, suppliers and EDA vendors in putting together SoWs, and NDAs is desirable
• Working knowledge of Jira is a plus
• Proven leadership, Proactive and highly self-motivated; good critical thinking skills and strong attention to detail
• Experience in working with senior, cross function/cross organization teams
• Strong communicator to manage a complex set of stakeholders - across multiple organizational levels and geographies
• Strong financial acumen and analytical skills, along with experience in driving efficiencies across an organization
• Innovation/change agent

Responsibilities

• Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
• Participates in the definition of architecture and microarchitecture features of the block being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Supports SoC customers to ensure high-quality integration and verification of the IP block.
• Drives quality assurance compliance for smooth IPSoC handoff.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level