LV-MV Technology Development Process Integration Engineer

onsemi•Hopewell Junction, NY

2d•Onsite

About The Position

Engineering Position in Low-Voltage and Medium-Voltage Technology Development and Process Integration, in Hopewell Junction NY 300mm facility. Position reports to LV-MV technology Director for the PSG Silicon MOSFET development group. The position leads new technology developments and initial product releases, working closely with the device development teams (Phoenix and Mountain Top) and the 300mm East Fishkill Semiconductor processing FAB. The position resides in NY. Responsibilities Responsibilities and skill required: Development of Low Voltage and Medium Voltage (MV) MOSFETs. Including: Defining process flow, process recipes, physical targets and control methodology to the process engineering team, along with establishing this process flow within the Fab’s factory systems. T-CAD simulation and calibration to match the device characteristics. Device characterization and trouble shooting. Ability to work effectively with the Device development, process engineering, Product engineering, assembly, marketing and operations teams. Leadership, device understanding and drive to create world-class leading technologies and products in defined timelines and budgets. Transfer of existing LV- MV MOSFET Discrete technologies, including: Following ON-Semi’s Develop technology transfer methodology with foundry, business groups, and global transfer team, providing team leadership. Provide technology information (process flow, process recipes, tool configuration) to the process engineering team for process set up and review process output to ensure functional device matching with the sending Fab, with good yields. Ability to work with Process engineering teams team to best match transferred processes to the best available processing equipment and metrology. Communicate with sending Fab engineer team to collect the necessary information regarding target technologies in the needed complete format. Provide technical knowhow to trouble shoot process and device failures for yield and performance improvement to meet the success criteria for the new or transferred technology. Provide technical knowhow to prevent and resolve reliability test failure issues. TCAD, JMP, Manufacturing MES systems, fundamental understanding of every processing technology inside the Fab, Test, Test set-up, device characterization, bench-testing, statistical analysis, Device physics, MOSFET engineering.

Requirements

Engineering degree in Micro Electronics, Electrical Engineering or Chemical Engineering: Preferred Masters or Ph.d. Mininmum, Bachelor’s degree and 4 years semiconductor industry experience in MV, HV MOSFET or IGBT research and development.
Capable of T-CAD process and device simulation and layout – design.
Must possess good interpersonal, teamwork, leadership, and communication skills.
Able to read/write/speak English fluently
Hands on experience on semiconductor wafer fab operation and development.
Hands on experience on either MV, HV or IGBT discrete technologies.
Experimental design and data analysis.
Familiar with MOSFET test, and testing methods.
Able to global travel.
TCAD
JMP
Manufacturing MES systems
fundamental understanding of every processing technology inside the Fab
Test
Test set-up
device characterization
bench-testing
statistical analysis
Device physics
MOSFET engineering.

Responsibilities

Development of Low Voltage and Medium Voltage (MV) MOSFETs. Including: Defining process flow, process recipes, physical targets and control methodology to the process engineering team, along with establishing this process flow within the Fab’s factory systems.
T-CAD simulation and calibration to match the device characteristics.
Device characterization and trouble shooting.
Ability to work effectively with the Device development, process engineering, Product engineering, assembly, marketing and operations teams.
Leadership, device understanding and drive to create world-class leading technologies and products in defined timelines and budgets.
Transfer of existing LV- MV MOSFET Discrete technologies, including: Following ON-Semi’s Develop technology transfer methodology with foundry, business groups, and global transfer team, providing team leadership.
Provide technology information (process flow, process recipes, tool configuration) to the process engineering team for process set up and review process output to ensure functional device matching with the sending Fab, with good yields.
Ability to work with Process engineering teams team to best match transferred processes to the best available processing equipment and metrology.
Communicate with sending Fab engineer team to collect the necessary information regarding target technologies in the needed complete format.
Provide technical knowhow to trouble shoot process and device failures for yield and performance improvement to meet the success criteria for the new or transferred technology.
Provide technical knowhow to prevent and resolve reliability test failure issues.