ML Compiler Software Engineer, TPU

Google • Sunnyvale, CA

2d

About The Position

Accelerated Linear Algebra (XLA) powers all ML workloads at Google. It’s also a choice of most external foundation model producers who value performance and reliability at large-scale. It is the most advanced ML compiler in the industry.

You will specialize in scaling capabilities of the compiler essential for supporting increasing model sizes. Your contributions as part of the team will be critical for achieving best performance and reliability for the most important and extremely large ML programs at Google and top external AI companies.

You will work with the world experts in ML hardware, compiler and performance optimization.

Our team operates across the layers of the compiler. You will have an opportunity to contribute across the stack from the higher level op rewrites to the low level emitters exercising specialized hardware features.

The US base salary range for this full-time position is $147,000-$211,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google [https://careers.google.com/benefits/].

Requirements

• Bachelor’s degree or equivalent practical experience.
• 2 years of experience with coding in C++, or 1 year of experience with an advanced degree.
• 1 year of experience with low-level programming.
• 1 year of experience working with hardware.

Nice To Haves

• Master's degree or PhD in Computer Science, or a related technical field.
• 2 years of experience with low level ML accelerator programming, compiler, or others close to hardware performance programming.
• Experience in profiling workloads, identifying and introducing performance optimization.
• Experience with high-performance C++.
• Experience with MLIR or LLVM.

Responsibilities

• Deliver compiler parallelization features and optimization techniques for TPU backend necessary for large-scale workloads.
• Contribute to collective operation lowering/implementation on TPU platform.
• Develop compiler optimization techniques at lower level and throughout the compiler stack.
• Analyze upcoming and existing features in TPU architectures and leverage them for most optimal horizontal scaling performance.
• Collaborate with ML Performance and research teams on achieving roofline performance for the most critical workloads. Build compiler related tools for debugging and preventing scaling issues and improving engineering experience.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level