Power and Perf Design Engineer

Intel • Hillsboro, CA

23h • Hybrid

About The Position

Designs, develops, and executes power and performance plans for IPs and SoCs. Identifies, builds, and maintains power, thermal, performance/watt optimizations, and characterizations for IPSoC power and performance goals. Conducts feature analysis from power and performance standpoint and drives to close any gaps between observed behavior and target on platforms in development. Provides recommendations for future architectures. Develops and enhances innovative tools for architectural performance analysis. Develops methodologies and models to drive continuous improvements in optimization of power and performance configurations to meet market requirements. Ensures platform and its components are optimized for performance and power balance. Identifies power activity zones and works with design, architecture, binning/technology, and manufacturing teams on ways to meet power consumption goals. Works cross functionally on analysis, validation, and tuning of architectures and features that advance the state of art in performance and efficiency. In this position, you will be a member of the Data Center Design Power and Performance (DCD PnP) team. This team is responsible for projecting and optimizing the power, binsplit, thermals, and power-limited performance for Data Center products including Xeon, Xeon-D, and Atom-based SoCs. We offer exciting opportunities to develop technical depth and leadership. Primary role responsibilities include: Build and maintain IP and SOC power models using: architectural, design, and process specifications; historical power data; and current generation power estimates Identifying RTL and physical power optimization opportunities by reviewing power estimation tool results Define IP power estimation requirements and audit FSDB and power estimation tool quality Additional role responsibilities and growth opportunities within the team may include: Set workload-based power targets for IPs and SoCs that support the market requirements and drive teams to meet these goals Identify and drive power and thermal optimizations to meet SOC PnP goals Define segment-specific workloads for power and thermal specifications Influence product definition starting from Pathfinding and Technology Readiness Deliver power data to partners to enable power delivery design, thermal modeling, and performance optimization Drive improvements to IP and SOC PnP methodology Participate in SKU definition to match PnP capabilities with manufacturing and marketing needs Collaborate worldwide with DCD PnP and cross-functional partner teams including SOC and IP Design, Architecture, Performance, Power Management, Power Delivery, Marketing, Planning, and Process

Requirements

• The candidate must have a Bachelor's degree Electrical/Computer Engineering and 4+ years of experience or an equivalent combination of education and experience.
• Pre-Si power analysis and modeling
• Power-aware design and identification of architectural, logical, and physical power reduction opportunities
• Understanding of power/performance trade-offs and optimizations
• Experience with industry-standard power estimation tools and Intel's design environment
• Programming or scripting, preferably in perl, python, or TCL
• Knowledge of general computer architecture and silicon concepts
• Thermal modeling and thermal spec for SoCs

Nice To Haves

• Skilled in effective communication, leadership, and teamwork
• Analytically-driven with strong problem-solving abilities
• A resourceful and disciplined self-starter
• Thorough and detail-oriented

Responsibilities

• Build and maintain IP and SOC power models using: architectural, design, and process specifications; historical power data; and current generation power estimates
• Identifying RTL and physical power optimization opportunities by reviewing power estimation tool results
• Define IP power estimation requirements and audit FSDB and power estimation tool quality
• Set workload-based power targets for IPs and SoCs that support the market requirements and drive teams to meet these goals
• Identify and drive power and thermal optimizations to meet SOC PnP goals
• Define segment-specific workloads for power and thermal specifications
• Influence product definition starting from Pathfinding and Technology Readiness
• Deliver power data to partners to enable power delivery design, thermal modeling, and performance optimization
• Drive improvements to IP and SOC PnP methodology
• Participate in SKU definition to match PnP capabilities with manufacturing and marketing needs
• Collaborate worldwide with DCD PnP and cross-functional partner teams including SOC and IP Design, Architecture, Performance, Power Management, Power Delivery, Marketing, Planning, and Process

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel .

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level