About The Position

We’re looking for an experienced Principal Engineer to lead complex, cross‑platform system validation and interoperability efforts for our next‑generation NVMe SSD products. You will shape technical direction within the group, architect scalable validation strategies, and drive engineering excellence across adjacent teams (firmware, hardware, QA, tools/automation). This role combines deep technical expertise with hands‑on leadership, designing robust test architectures, elevating standards, and mentoring engineers to deliver high‑impact, customer‑grade quality at scale.

Requirements

  • BS/MS in EE/CE/CS or related field with 10+ years in SSD validation, platform integration, or storage system engineering.
  • Deep expertise in: NVMe command/admin flows, queues, error‑recovery
  • PCIe link behavior, LTSSM, training, ASPM, surprise/hot removal
  • Linux (blk‑mq, IO scheduler, kern logs) and Windows storage paths
  • Server‑class BIOS/UEFI, ACPI, power/thermal states, crash dump flows
  • Robust hands‑on experience with fio, multi‑threaded stress patterns, and high‑complexity system workloads.
  • Automation proficiency with Python (preferred), Bash, and PowerShell.

Nice To Haves

  • Prior ownership of system‑level integration or interop validation for enterprise/cloud SSDs or server platforms.
  • Knowledge of FTDC frameworks, telemetry analysis, automated RCA workflows, or system‑level coverage design.
  • Familiarity with validation KPIs such as DPPM, escape metrics, and system‑level coverage modeling.
  • Experience debugging across firmware, PCIe electrical, drivers, OS internals, and system microcode interactions.

Responsibilities

  • Lead system integration strategy for functional, stress, and interoperability validation across diverse platforms and operating systems.
  • Develop scalable automation for system‑level workflows, including NVMe functional tests, reset/boot flows, PCIe behaviors, and telemetry/FTDC collection.
  • Drive system‑level triage by identifying failure domains, improving debug repeatability, and accelerating root‑cause isolation.
  • Collaborate across FW, HW, Validation, Tools, and Architecture to ensure system behaviors and issues inform design and release decisions.
  • Enhance productivity by improving test coverage efficiency, reducing execution cycle time, and optimizing platform readiness.
  • Introduce new methodologies for system interop, workload generation, stress scenarios, and validation quality gating.
  • Mentor engineers, uplift technical practices, and strengthen system‑level engineering rigor.
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