R&D Engineer IC Design

Broadcom • San Jose, CA

2d

About The Position

Engineer will be responsible for verification of complex switch designs. Responsibilities will include creating SystemVerilog-based verification environments (testbenches, checkers, transactors) as well as creating and executing testplans for verifications of RTL and gatesim-based designs at both the block and chip level. The engineer will also be tasked with creating ATE testing vectors, as well as C-based diagnostic tests to be run on the actual silicon.

Requirements

• A Master's Degree in Electrical and Electronic Engineering, Computer Science, or equivalent
• A minimum of 6 years of work experience in Design Verification
• Strong knowledge and hands-on experience in verification methods, tools and environment
• Strong programming skills, including in System Verilog and scripts languages
• Knowledge and experience in UVM methodology is preferable
• Knowledge of networking and switching concept is a plus

Responsibilities

• creating SystemVerilog-based verification environments (testbenches, checkers, transactors)
• creating and executing testplans for verifications of RTL and gatesim-based designs at both the block and chip level
• creating ATE testing vectors
• creating C-based diagnostic tests to be run on the actual silicon

Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company paid holidays
• paid sick leave and vacation time

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level