Senior Firmware Engineer (Senior–Senior Principal, IC)

Astera Labs•San Jose, CA

11d•$135,000 - $255,000•Onsite

About The Position

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Overview Astera Labs is seeking Firmware Engineers across multiple seniority levels to architect, develop, and deliver core firmware for our next-generation connectivity, chiplet, and system products. This is a catch-all requisition designed to hire exceptional firmware talent aligned to one or more critical technical domains across PCIe/CXL, Ethernet, UALink, UCIe/Chiplet, and Device Driver development. Firmware is a core differentiator for Astera Labs’ products and is treated as a first-class engineering discipline, on par with hardware and silicon design. Engineers in this role will work closely with Architecture, RTL, Physical Design, Validation, and Systems teams, and may be customer-facing to support integration, debug, and deployment in hyperscale and data-center environments. We are hiring Individual Contributors (Senior up to Senior Principal) . This role is required onsite in San Jose, CA.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (Master’s preferred).
Strong fundamentals in embedded systems, computer architecture, and low-level software.
Proven experience developing firmware for complex SoC or silicon-based products in Server, Storage, Networking, or Accelerator environments.
Proficiency in C (required); C++ experience is a plus.
Ability to work cross-functionally in a fast-paced, highly technical environment.
Bare-metal or RTOS-based firmware development (e.g., ThreadX, MQX, or equivalent).
Firmware development for on-chip microcontrollers and supporting SDKs.
Strong debugging skills across hardware, firmware, and system layers.
Familiarity with firmware build systems and tooling (gcc, Make, Git, Doxygen).
Python scripting for automation, validation, or tooling.
Hands-on experience with server, storage, or networking systems.

Nice To Haves

Firmware development for PCIe or Ethernet switch products.
Exposure to BMCs, OpenBMC, or system management firmware.
Experience with high-speed interfaces such as: PCIe (Gen3+) Ethernet (100G / 400G+) DDR, NVMe, USB, Infiniband
Participation in industry forums or ecosystems (e.g., OCP, OpenBMC).
Customer-facing or field-enablement experience.

Responsibilities

Architect, develop, and maintain bare-metal and low-level firmware running on embedded microcontrollers within Astera Labs SoCs and systems.
Design and implement device drivers, core firmware services, and hardware abstraction layers for high-speed connectivity products.
Define and implement HW-SW interfaces in close collaboration with RTL, PD, and Architecture teams.
Lead bring-up, debug, and validation of firmware on silicon and system platforms.
Develop and maintain C/C++ firmware codebases, SDKs, and supporting infrastructure.
Build automation, tooling, and diagnostics using Python and scripting frameworks.
Participate in system-level debug involving PCIe, Ethernet, memory subsystems, and interconnect fabrics.
Support customer enablement, integration, and escalations as needed.

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