Senior Silicon Lab Engineer, Product Engineering

Amazon-posted 2 days ago
$123,200 - $213,000/Yr
Mid Level
Sunnyvale, CA
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This role supports Kuiper's custom silicon development on the test / product engineering side - coordinating and executing qualification at our rel lab partners, test program development and data collection, silicon prototype data collection at our test lab partners, and FA / RMA debug and data analysis / review with the internal silicon teams.

  • Handle qual silicon, through serialization, testing, validating data and defining golden unit plan and methodologies.
  • Load qual units onto rel chambers for HTOL, HAST, TC and other stresses.
  • Troubleshoot qual failures through golden unit validation, visual inspection and non-destructive testing of failing units.
  • Audit and verify silicon handling processes at rel and test lab partners to ensure compliance to ESD specifications and procedures.
  • Review datalogs at downpoint testing and verify / validate golden unit data.
  • Download test datalogs onto internal data management and analytics systems for further analysis with test and product engineering teams.
  • Support ongoing rel monitoring activities such as ELFR with coordination between rel and test lab partners.
  • Support data collection for test program development and test hardware validation.
  • Large sample data collection and logging in Exensio / JMP through characterization for ASIC product development bring-up.
  • RMA coordination with re-balling of defective units at local vendors, verification of re-balling through inspection, and test data collection on re-balled RMA units.
  • FA coordination with local FA labs through debug, and physical FA.
  • Bachelor's degree or equivalent in Electronics, Electrical Engineering.
  • Experience in semiconductor industry handling ASICs through product development and qualification.
  • 7+ years working in a silicon lab environment.
  • Strong knowledge of qualification procedures and guidelines for advanced semiconductor products.
  • Experience in working with external lab partners for ATE testing and reliability stresses.
  • Knowledge of standard operating procedures and methodologies in loading / unloading silicon from ATE testers and reliability ovens.
  • Familiarity with ESD protocols when handling silicon.
  • Knowledge of inspection procedures and non-destructive techniques such as CSAM and X-ray.
  • Experience with data collection procedures and data analytic tools such as JMP and Exensio.
  • Medical, financial, and/or other benefits.
  • Equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package.
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