Senior Verification Engineer

Microsoft•Raleigh, NC

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior Verification Engineer to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Compute Silicon and Manufacturing Engineering (CSME) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior Verification Engineer with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior Verification Engineer to join the team.

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Nice To Haves

3+ years of experience working on Computer Architecture and SoC design and verification principles, including using industry standard HDLs like System Verilog.
3+ years of experience developing and using verification environments in industry standard languages like SVTB UVM or formal verification.
3+ years of experience in design verification with a proven track record of delivering complex SOC, SS or IP testbenches.
Experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
Experience with verification for multiple product cycles from definition to Silicon, including writing test plans, developing tests, debugging failures and coverage signoff in Universal Verification Methodology (UVM) and C++.
Experience with ARM architecture and AMBA protocols.
Demonstrated expertise in one or more of the following
PCIe/CXL - Controller/PHY IPs, protocols and related firmware
I/O virtualization
Coherent and non-coherent fabric IPs and protocols
IO, High speed interconnects
Knowledge of full chip and system level flows and protocols.
Comfortable and experienced with AI based tools to accelerate productivity.
Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.

Responsibilities

Interact with architects and design engineers to create testplans covering verification strategy, test requirements, and test environments for SS- or SOC-level verification.
Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness.
Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments.
Define and implement functional coverage and drive coverage closure.
Run tests, debug failures to root cause, and recommend fixes.
Apply your growth mindset to learn and adapt in a complex and dynamic environment.
Collaborate across verification teams on vertical and horizontal reuse of components.
Mentor and coach team members.
Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers.
Embody our culture and values.