Senior Verification Engineer

Indie SemiconductorSan Jose, CA
1d$176,696Onsite

About The Position

Imagine being part of a team that’s redefining the future of mobility—where your ideas don’t just sit in a lab but power next-generation technology. At indie, we are developing cutting-edge semiconductors, photonics, and radar sensors and systems for automotive, industrial, and adjacent markets. Our innovations are at the heart of advanced intelligent sensing and user experience applications, pushing the boundaries of what’s possible. If you're passionate about groundbreaking technology and want to make a real impact alongside a fast-paced team that thrives on creativity and collaboration, we’d love to have you on board!

Requirements

  • Master of Science or equivalent in Electronic Engineering, Electrical Engineering, Computer Engineering, or related.
  • 12 months as Senior Engineer Verification, or Senior Design Verification Engineer or related occupation.
  • 12 months of work experience with each of the following: SoC protocols including AMBA, DDR memory, MIPI, I2C, SPI, UART; Random and constrained random verification using UVM methodology; Application-specific integrated circuit (ASIC); Verification of System-on-Chip (SoC) devices with embedded processor; Standard verification tools, protocols, and Verification IP.

Responsibilities

  • Work on block and chip-level verification using the standard UVM methodology and verification plan.
  • Work in the Vision business unit which is responsible for creating power-efficient System-on-a-Chip (SoC) ASIC devices for the automotive market.
  • Test bench infrastructure development.
  • Create random and constrained random test cases.
  • Work on specification and collection of functional and code coverage.
  • Support FPGA emulation team with test case debug.
  • Interact with the post-silicon validation team for ASIC bring-up and characterization.
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