Sr. Staff Product Development Engineer - Test Methodology Engineer
About The Position
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a Sr. Staff Test Methodology Engineer to help build the next generation of AI silicon and platforms, they will we need a to own the tools, systems, and processes that make our product and test engineers successful. The role will work across DFT, systems, software, and architecture to define how we bring up, validate, and scale high-volume production test for advanced AI devices. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A senior semiconductor test engineering leader with 15 years experience, who has built and scaled ATE-based production test for complex SoCs. Hands-on with Teradyne (UltraFlex/J750) and/or Advantest V93K and comfortable defining tester and handler strategies, not just using existing ones. Fluent with revision control and CI/CD (gitlab, github, Bitbucket, pipelines) and passionate about robust, automated infrastructure. Comfortable collaborating across DFT, systems, software, and architecture, and with OSAT partners, to drive low test-escape rates and high yield. A systems thinker who understands probe card/load board design considerations, fuse/eFuse programming, and production data analysis. A scripting-oriented engineer (Python, Perl, or TCL) who drives automation and efficiency across test flows and infrastructure. Curious about next-generation advanced packaging (2.5D, chiplets) and how it changes test methodology.
Requirements
- BS/MS in EE/ECE/CE with 15 years in semiconductor test engineering with hands-on experience with Teradyne UltraFlex/J750 and/or Advantest V93K.
- Ability to define and specify tester and handler roadmaps aligned to product and technology needs.
- Understanding of probe card and load board design and standardization.
- Ownership of test program revision control and release automation pipelines and experience with distributed revision control (gitlab, github, Bitbucket) and CI/CD for test content.
- Ability to architect ATE data flows from tester into yield management and analytics systems; familiarity with STDF and production data systems.
- Experience with pattern formats (STIL, WGL) and developing/maintaining pattern conversion flows to ATE-native formats.
- Proven experience with fuse/eFuse programming methodology, repair flows, and defining fuse map methodology across teams and fusing steps.
- Ability to define methodology documentation and training for global test teams.
- Experience supporting high-volume manufacturing at OSATs, including silicon bring-up and production ramp.
- Demonstrated ability to drive automation and efficiency improvements across test infrastructure using Python/Perl/TCL.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
