About The Position

Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking an experienced Senior Substrate CAD layout Engineer for the next generation of our ML ASIC. This is a fast-paced, intellectually challenging position, and you’ll work with thought-leaders in multiple technology areas. You’ll have relentlessly high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve your products performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. As a Substrate/PCB layout engineer, you will participate in the definition and implementation of substrate and PCB boards. This individual will contribute in all phases of the product’s design, including placement, routing, constraint table management, and drafting. You must bring a combination of Substrate/PCB design, assembly, test and fabrication knowledge, cross team functional interdependence, and demonstrable design process experience to the position.

Requirements

  • B.S. in Electrical Engineering or related field
  • 7+ years of experience of PCB layout design
  • 7+ years of current experience using Cadence Allegro PCB Design/CIS
  • 7+ years of current experience using Cadence SIP and APD
  • 7+ years of experience with high speed and impedance circuits
  • 7+ years of experience with compact, dual side assembly design
  • Experience with HDI design
  • Experience with BGA pitch of equal or less than 0.5mm

Nice To Haves

  • M.S. in Electrical Engineering or related field
  • 15+ years’ experience of PCB layout design
  • 10+ years of current experience using Cadence APD, SIP and Allegro PCB Design/CIS
  • Proven track record to design & manage all aspects of the printed board design
  • Ability to collaborate and communicate with all cross functional teams and external customers.
  • Ability to reduce risk of fabrication/assembly/test with a thorough knowledge in each area and taking preventative action early in the design phase to make this a reality
  • Ability to debug schematic net-list-in errors
  • Ability to develop Allegro scripts or writing in Cadence Skill

Responsibilities

  • Work with the Electrical Engineering hardware team to provide PCB board design services
  • Work with fabrication vendors to supply data and seek fabrication design requirements
  • Work with assembly vendors to supply data and seek assembly design requirements
  • Deliver best in class Substrate/PCB design to high-volume manufacturing
  • Assist as necessary in schematic and PCB footprint development
  • Work with the company PLM system to write and release ECO’s

Benefits

  • health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
  • 401(k) matching
  • paid time off
  • parental leave
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