Staff Machine Learning Compiler Engineer

Rivian • Palo Alto, CA

9d

About The Position

Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.
As a company, we constantly challenge what’s possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

Role Summary

In this position you will be a key member of the ML Compiler team working on software tools to enable inference of deep learning networks hardware on Rivian Hardware Platforms. You will work closely with the Rivian Autonomy and Hardware teams and evaluate various implementation targeting for performance. You will help bring up new hardware and add support in the compiler for these hardware features.
This compiler enables HW-SW codesign and would result in developing efficient building blocks for state-of-the-art machine learning models. You will be collaborating with other cross functional teams in understanding the workloads, enabling running workloads on HW and help define the future enhancements to hardware and models.

Requirements

• Ph.D. or M.S. in Computer Engineering or a related field.
• Excellent C/C++ and Python programming skills.
• Experience with various SOC platforms used for machine learning.
• Strong understanding of deep learning software models.
• Experience in compiler pipeline development preferred.
• Proficiency in deep learning frameworks and their low-level IRs or export formats.
• Experience working in aggressive design environments is preferred.

Nice To Haves

• Prior experience working with hardware-software co-design, especially for autonomous or robotics platforms.
• Deep knowledge of numerical precision trade-offs, quantization-aware training (QAT), and dynamic/static quantization flows.
• Familiarity with embedded real-time constraints and hardware profiling/debugging tools.
• Familiarity with rearchitecting models to best suit hardware capabilities.

Responsibilities

• Lead the development of an ML Compiler for mapping Autonomy ML models to Rivian Autonomy Processor (RAP1).
• Design and implement hardware-aware optimizations, including quantization strategies, model compression, memory-efficient representations, and operator fusion, targeted to RAP1.
• Collaborate with hardware teams to co-optimize model architecture and compute pipeline under real-time constraints (latency, throughput, power).
• Benchmark and analyze system performance across platforms and iterate to achieve optimal deployment efficiency.
• Partner with autonomy teams to align model optimization efforts with hardware roadmap and real-world autonomy requirements.

Benefits

• We offer a comprehensive package of benefits for full-time and part-time employees, their spouse or domestic partner, and children up to age 26, including but not limited to paid vacation, paid sick leave, and a competitive portfolio of insurance benefits including life, medical, dental, vision, short-term disability insurance, and long-term disability insurance to eligible employees.
• You may also have the opportunity to participate in Rivian’s 401(k) Plan and Employee Stock Purchase Program if you meet certain eligibility requirements.
• Full-time employee coverage is effective on their first day of employment.
• Part-time employee coverage is effective the first of the month following 90 days of employment.
• More information about benefits is available at rivianbenefits.com.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Education Level: Ph.D. or professional degree