Video DV Engineer

Qualcomm • San Diego, CA

1d

About The Position

The Multimedia Video Hardware team seeks an experienced Video Lead to drive next-generation video codec architectures for Qualcomm’s product portfolio.
Responsibilities include:
Architecting high-performance, power-efficient mobile video codec designs
Conducting performance, power, and area tradeoff analyses
RTL implementation using Verilog/SystemVerilog
Collaborating with hardware and software teams to define multimedia system designs
Defining hardware micro-architecture for video codec algorithms
Utilizing models, simulators, and hardware for quantitative architectural decisions
Communicating experimental results and resolving technical issues
Innovating and patenting technical solutions

Requirements

• Experience in multimedia hardware development (imaging, video, display, audio)
• Knowledge of SoC bus, interconnect, and memory technologies
• MS degree with 7+ years in multimedia architecture, video codec standards, VLSI design, and verification
• Proficiency in Verilog/SystemVerilog, C/C++, SystemC
• Experience with simulators and performance/power models
• Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer or Electrical Engineering, Computer Science, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer or Electrical Engineering, Computer Science, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Nice To Haves

• Expertise in video codec and image processing architecture and algorithms
• Strong communication, documentation, and presentation skills
• Demonstrated technical and people leadership

Responsibilities

• Architecting high-performance, power-efficient mobile video codec designs
• Conducting performance, power, and area tradeoff analyses
• RTL implementation using Verilog/SystemVerilog
• Collaborating with hardware and software teams to define multimedia system designs
• Defining hardware micro-architecture for video codec algorithms
• Utilizing models, simulators, and hardware for quantitative architectural decisions
• Communicating experimental results and resolving technical issues
• Innovating and patenting technical solutions

Benefits

• We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level