Analog Design Engineer - I/O (BP-64000975)

Cirrus Logic • Austin, TX

1d • Hybrid

About The Position

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!

Cirrus Logic is seeking an innovative Analog Design Engineer to join our team. In this position, you will work on Analog IP research and development including band-gap based power on reset circuits, standard cells, deglitch cells, delay macros and I/O library development; design, simulate, characterize and validate various libraries based on standard analog IP component design, as well as validation of I/O circuits, band-gap-based power on reset circuits, standard cells, de-glitch cells, delay macro’s, and level shifters, both dynamic and static; transistor level design of analog IP, characterization for timing, work with layout teams to get the IP on silicon, work with design teams to define the specs for the IP, develop Verilog models for the IP, and provide guidance for integration of the IP into the chip level floorplan. This is an important position in a lively, exciting, and dynamic environment that provides excellent opportunities for personal and professional growth.

Requirements

• Master's degree with 5+ years; PhD with 3+ years; or Bachelor's degree in Electrical or Computer Engineering with 7+ years of proven IC development experience.

Nice To Haves

• Understanding of power and speed tradeoffs in the design of analog Ips sufficient to create analog I/Os and IPs.
• Understanding of low leakage IP’s to be used in mobile phone and IoT applications to design analog I/Os and IPs.
• An understanding of layout and the ability to guide layout engineers sufficient to design analog I/Os and IPs.
• Proficiency with Cadence, Synopsys, or similar schematic capture, layout, and simulation tools sufficient to design analog IPs.

Responsibilities

• Develop mixed-signal circuitry from concept to production.
• Perform transistor-level circuit simulation and design sufficient to create analog I/Os and IPs.
• Simulate and verify circuit performance and functionality using Spectre and Maestro.
• Simulation and verification at the chip level using analog-on-top and digital-on-top methodologies.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level