Analog IC Design Staff Engineer

Marvell Technology • Santa Clara, CA

1d • $187,000 - $189,000

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects. What You Can Expect Design PLL and clocking circuit design with high speed and low jitter. Specialized in high performance VCO development. Work on analog design of high-speed and high performance SerDes in advanced technology nodes, 5nm, 3nm and beyond. Provide new technique development for next generation SERDES and other general Analog IPs. Work with the AE for the IP characterization and validation plan. Provide the instructions to the layout engineers. Support IP Lab characterization and debugging. Wage $187,000.00 - $189,000.00 per year. What We're Looking For Master’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or related field and two (2) years of experience in the job offered or related occupation. Alternatively, Employer will accept a PhD or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or related field. Must have work/internship experience or completed graduate coursework/research in each of the following: • Cadence: Virtuoso for IC schematic design and layout. • Cadence Spectre/SpectreRF for analog, RF, and mixed-signal IC simulation and verification. • Verilog-A, Verilog-AMS, Verilog-HDL languages to model, simulate and verify analog/mixed-signal circuits. • ModelSim to perform system-level PLL simulation and verification based on Verilog-HDL source files and post-routing files. • Matlab to develop algorithm for PLL system-level modeling, simulation, verification, to process simulation data and plot figures for visualization. • EMX/ Sonnet/ HFSS to design transformer layout and do EM simulation. • Design RF PCB layouts and do RFIC testing. Any suitable combination of education, training, or experience is acceptable. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TT1 Join our talent community to hear about company news, job openings and events. Join our Talent Community! Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Recruitment fraud is a well-known way that third parties try to get personal information or to steal money from you. Please review Marvell’s guidance here to learn more on how you can protect yourself.

Requirements

• Master’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or related field and two (2) years of experience in the job offered or related occupation.
• Alternatively, Employer will accept a PhD or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or related field.
• Must have work/internship experience or completed graduate coursework/research in each of the following:
• Cadence: Virtuoso for IC schematic design and layout.
• Cadence Spectre/SpectreRF for analog, RF, and mixed-signal IC simulation and verification.
• Verilog-A, Verilog-AMS, Verilog-HDL languages to model, simulate and verify analog/mixed-signal circuits.
• ModelSim to perform system-level PLL simulation and verification based on Verilog-HDL source files and post-routing files.
• Matlab to develop algorithm for PLL system-level modeling, simulation, verification, to process simulation data and plot figures for visualization.
• EMX/ Sonnet/ HFSS to design transformer layout and do EM simulation.
• Design RF PCB layouts and do RFIC testing.
• Any suitable combination of education, training, or experience is acceptable.

Responsibilities

• Design PLL and clocking circuit design with high speed and low jitter.
• Specialized in high performance VCO development.
• Work on analog design of high-speed and high performance SerDes in advanced technology nodes, 5nm, 3nm and beyond.
• Provide new technique development for next generation SERDES and other general Analog IPs.
• Work with the AE for the IP characterization and validation plan.
• Provide the instructions to the layout engineers.
• Support IP Lab characterization and debugging.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level