Analog Layout Engineer

Broadcom • San Jose, CA

2d

About The Position

Broadcom is looking for an experienced RFIC and Analog Mixed-Signal Physical Design and Layout Engineer Qualifications include: BS in Electrical Engineering, Computer Engineering or related degree preferred with 8+ years of experience in Mixed Signal and Analog RF IC Physical Design or MS in Electrical Engineering, Computer Engineering or related degree preferred with 6+ years of experience in Mixed Signal and Analog RF IC Physical Design. Experience developing and leading complex layout IC for high speed applications in advanced CMOS FinFET technologies at the block level and chip level. Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys. Experience with layout of high-performance TIAs, CMOS drivers, high-speed Data converters and PLLs. Experience with floor planning, block level routing and top-level chip assemble Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electromigration. Knowledge of circuit design concepts and IC manufacturing processes. Understanding of silicon process technologies and device physics. Experience working with distributed design teams. Knowledge of skill code and layout automat is a plus. Self-starter with the ability to define and adhere to a schedule. Must possess strong written and verbal communication skills.

Requirements

• BS in Electrical Engineering, Computer Engineering or related degree preferred with 8+ years of experience in Mixed Signal and Analog RF IC Physical Design or MS in Electrical Engineering, Computer Engineering or related degree preferred with 6+ years of experience in Mixed Signal and Analog RF IC Physical Design.
• Experience developing and leading complex layout IC for high speed applications in advanced CMOS FinFET technologies at the block level and chip level.
• Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
• Experience with layout of high-performance TIAs, CMOS drivers, high-speed Data converters and PLLs.
• Experience with floor planning, block level routing and top-level chip assemble
• Knowledge of layout techniques such as floor planning, layer generation, thermal aware layout with consideration for electromigration.
• Knowledge of circuit design concepts and IC manufacturing processes.
• Understanding of silicon process technologies and device physics.
• Experience working with distributed design teams.
• Self-starter with the ability to define and adhere to a schedule.
• Must possess strong written and verbal communication skills.

Nice To Haves

• Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels.
• Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results.
• Excellent time and task management, and interpersonal skills.
• Willingness to travel when required.
• May manage resources to achieve group objectives
• Knowledge of skill code and layout automat is a plus.

Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company paid holidays
• paid sick leave and vacation time
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level