Design Verification Engineer

Apple • Cupertino, CA

13h

About The Position

Imagine what you can do here. Apple is a place where extraordinary people gather
to do their lives best work. Together we create products and experiences people
once couldn’t have imagined, and now, can’t imagine living without. It’s the
diversity of those people and their ideas that inspires the innovation that runs
through everything we do.

DESCRIPTION

APPLE INC has the following available in Cupertino, California and various
unanticipated locations throughout the USA. Engage in regular meetings with
design and micro architecture teams to comprehend the functional and performance
objectives of the ongoing design projects. Thoroughly examine and assess design
specifications to gain a comprehensive understanding of the project
requirements. Identify potential areas for improvement or clarification.
Establish a robust testbench methodology tailored to project requirements,
ensuring efficient verification processes. Write Tests and Generate Test
Coverage. Develop SystemVerilog checkers using UVM methodology to verify new
debug features. Regularly update and enhance test cases to adapt to evolving
project needs. Execute regular regression tests to validate the functionality
and performance of the design under various scenarios. Analyze test failures,
trace signals using tools like Verdi, and collaborate with the design team to
address issues. Take ownership of individual tasks and deliverables, ensuring
alignment with project goals and timelines. 40 hours/week. At Apple, base pay is
one part of our total compensation package and is determined within a range.
This provides the opportunity to progress as you grow and develop within a role.
The base pay range for this role is between $156,853- $220,900/yr and your base
pay will depend on your skills, qualifications, experience, and location. PAY &
BENEFITS: Apple employees also have the opportunity to become an Apple
shareholder through participation in Apple’s discretionary employee stock
programs. Apple employees are eligible for discretionary restricted stock unit
awards, and can purchase Apple stock at a discount if voluntarily participating
in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including:
Comprehensive medical and dental coverage, retirement benefits, a range of
discounted products and free services, and for formal education related to
advancing your career at Apple, reimbursement for certain educational expenses —
including tuition. Additionally, this role might be eligible for discretionary
bonuses or commission payments as well as relocation. Learn more about Apple
Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit,
compensation and employee stock programs are subject to eligibility requirements
and other terms of the applicable plan or program.

Requirements

• Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
• Using System Verilog for developing and debugging RTL, testbench environment, Models, and Verification IP code
• Utilizing C++ and C for developing SoC test code
• Using Verilog to write and debug RTL and Testbench code
• Scripting using Perl and Python for testbench simulation flows automation
• Proficiency in Computer Architecture to apply to SOC architecture and design
• Performing RTL design verification using digital circuits/design concepts
• Utilizing design verification concepts to functionally verify RTL Design Under Test

Nice To Haves

• N/A

Responsibilities

• Engage in regular meetings with design and micro architecture teams to comprehend the functional and performance objectives of the ongoing design projects.
• Thoroughly examine and assess design specifications to gain a comprehensive understanding of the project requirements. Identify potential areas for improvement or clarification.
• Establish a robust testbench methodology tailored to project requirements, ensuring efficient verification processes.
• Write Tests and Generate Test Coverage.
• Develop SystemVerilog checkers using UVM methodology to verify new debug features.
• Regularly update and enhance test cases to adapt to evolving project needs.
• Execute regular regression tests to validate the functionality and performance of the design under various scenarios.
• Analyze test failures, trace signals using tools like Verdi, and collaborate with the design team to address issues.
• Take ownership of individual tasks and deliverables, ensuring alignment with project goals and timelines.

Benefits

• Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.
• Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.
• Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
• this role might be eligible for discretionary bonuses or commission payments as well as relocation

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level