Principal Design Engineer

Micron TechnologySan Jose, CA
1d$140,000 - $298,000

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer in the NVE Design Engineering Core group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products!

Requirements

  • MS (PhD preferred) in electrical engineering required.
  • 8+ years of NAND design relevant proven experience required with proficient knowledge of Nand Flash memory read, program and erase algorithms
  • A very high level of self-motivation and proactivity.
  • Proficiency in analog/mixed signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, IO buffers, RTL, Verilog)
  • Proficient fundamentals in semiconductor and device physics and analog/mixed-signal circuit design. An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electromigration (EM) and IR analysis.
  • Proficient circuit debugging and problem-solving skills.
  • Proficiency in circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout.
  • Proficient in analog and digital simulators such as HSPICE, Fast SPICE, and Verilog
  • Proficient coding skills in Python (plus Bash/Tcl a bonus), and proficient working with structured data (CSV/JSON/SQLite) and version control.
  • Proficient with Cadence design, LVS/DRC tools and UNIX.
  • Excellent teamwork attitude. Good verbal communication skills (English) and ability to convey sophisticated technical concepts in verbal and written form.

Responsibilities

  • Serve as a technical authority in the analog/core functional team for NAND projects, participating in pathfinding activities and solving sophisticated technical problems.
  • Architect NAND Xpath, Ypath, algorithms, waveforms, drive alignment of design solutions, methodologies, DTCO and circuits, including detailed competitive analysis (CA) across a distributed matrix organization, working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions, across geographies and time zones!
  • Coordinate project planning according to achievements, ensuring tasks are completed on time.
  • Designing, simulating, optimizing, and floor planning NAND circuits, evaluating design feasibility and analyze circuit functionalities. Perform die size cost and benefits analysis of new array circuits and algorithms prior to implementation.
  • Implementing analog and mixed signal circuit design to meet specifications, validating design performance and functionalities by running block and chip level simulations using standard industry simulators and mentor other engineers for the same.
  • Collaborate productively with other team members in your team.
  • Build and maintain Python-based AI utilities that collaborates with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques.
  • Review existing and create new user documentation.
  • Working with and supporting the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

Benefits

  • medical
  • dental
  • vision plans
  • programs that help protect your income if you are unable to work due to illness or injury
  • paid family leave
  • a robust paid time-off program
  • paid holidays
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