Principal Engineer, Router Architect

Renesas ElectronicsAustin, TX
12dHybrid

About The Position

We are seeking a Principal Router Architect with 10 to 15 years of experience to define the backbone of next-generation Zonal and Central Compute Automotive architectures. This role focuses on architecting high-bandwidth, ultra-reliable Ethernet Routing Engines and PCIe subsystems that serve as the primary data fabric for Autonomous Driving (AD) and Cockpit controllers. The ideal candidate will bridge the gap between high-speed data center-grade throughput and the rigorous Safety (ISO 26262) and Deterministic Networking requirements of the automotive industry.

Requirements

  • Education: Bachelor’s or Master’s in Electrical Engineering or Computer Engineering (PhD desirable)
  • Experience: 12+ years in high-speed networking or SoC architecture, with at least 5 years focused on Automotive-grade silicon.
  • TSN Mastery: Deep expertise in IEEE 802.1 TSN protocols and their hardware implementation for real-time traffic shaping and synchronization.
  • Protocol Expertise: Expert knowledge of PCIe (Root Complex/Endpoint) and Automotive Ethernet (10BASE-T1S to 10G+ levels).
  • Automotive Standards: Familiarity with ISO 26262 functional safety flows and AEC-Q100 reliability requirements.
  • System Integration: Proven track record of integrating routing engines into complex SoCs using AXI/CHI bus protocols and managing IOMMU configurations.

Responsibilities

  • Automotive Ethernet Routing: Architect L2/L3 switch fabrics supporting Time-Sensitive Networking (TSN) standards (e.g., IEEE 802.1AS, 802.1Qbv, 802.1Qbu) to ensure deterministic latency for safety-critical traffic.
  • PCIe Backbone Architecture: Define PCIe Gen 5/6 integration for high-speed chip-to-chip connectivity between SoCs, AI accelerators, and storage, including support for SR-IOV to virtualize resources across multiple Virtual Machines (VMs).
  • Functional Safety (ASIL): Integrate hardware safety mechanisms (ECC, Parity, BIST, and End-to-End protection) to meet ASIL-B/D requirements within the routing engine and bus fabrics.
  • Zonal Interconnect & Bus Fabric: Design the interface between Ethernet/PCIe controllers and internal NoC/CHI fabrics, ensuring efficient data movement for ADAS sensors (Camera, LiDAR) and telemetry.
  • Virtualization & Security: Architect hardware-assisted isolation and Secure On-board Communication (SecOC) to protect the vehicle network from cyber threats while allowing shared access to network resources.
  • Infrastructure & Power: Define robust clock, reset, and power management schemes capable of operating under automotive thermal profiles and supporting rapid "Instant-On" boot requirements
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