This project provides PhD students with a comprehensive, hands-on experience in the full digital ASIC design lifecycle—spanning from RTL design to physical implementation—integrated with cutting-edge research in physics-based circuit design, simulation, and emulation. Students will leverage artificial intelligence to bridge the gap between foundational physical properties and system-level performance by linking material composition, geometry, and operating conditions to defect evolution and device behavior. By developing these AI-driven models, students will help accelerate computationally intensive simulation processes and pioneer non-intuitive optimization techniques within the electronic design automation (EDA) stack. This interdisciplinary approach aims to enhance design flexibility and enable the creation of highly resilient, next-generation microelectronics through advanced physics-based emulation and multi-scale modeling. Education and Experience Requirements The entirety of the appointment must be conducted within the United States. Applicants must be: Currently enrolled in undergraduate or graduate studies at an accredited institution. Graduated from an accredited institution within the past 3 months; or Actively enrolled in a graduate program at an accredited institution. Must be 18 years or older at the time the appointment begins. Must possess a cumulative GPA of 3.0 on a 4.0 scale. If accepting an offer, candidates may be required to complete pre-employment drug testing based on appointment length. All students remain subject to applicable drug testing policies. Must complete a satisfactory background check.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
Job Type
Full-time
Career Level
Intern
Education Level
No Education Listed
Number of Employees
1,001-5,000 employees