Digital Flow Enablement Solutions Architect

Cadence Design Systems

2d

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The position involves: Leading customer engagements on standard cell library optimization and RTL->GDS enablement, including techLEF creation and updates, mapping files, and general flow development. Interfacing with customers regarding digital flow enablement and methodologies, including: timing characterization, including sensitivity modeling, Physical view generation (LEF, GDS, abstracts, etc) Logical view generation (LIB, CDL, Spectre, etc) Technology LEF creation for digital tools MSOA flows Performing design of experiments and running Genus/Innovus to validate techLEF correctness and library performance and DRC correctness Tempus timing flow development and validation Working closely with R&D on tools and methodology improvements Other digital P&R tasks as needed by the group Processes nodes range from 1.4nm to 350nm, with majority of work at GAA advanced nodes

Requirements

• Bachelor’s degree with at least 12-16 years of design/EDA experience or Master’s degree with at least 10 years of experience. Master’s degree preferred.
• Knowledge of standard cell and IO design, optimization and characterization methodology including LLE/LDE effects
• Excellent digital simulation and debug skills
• Experience with techLEF development at advanced nodes a must
• Understanding of Liberty (.lib), Verilog & other views, such as NLDM, CCS & ECSM
• Strong knowledge of Digital Design flows and Static Timing Analysis
• Prior experience with ASIC digital implementation flows and EDA tools is required
• Experience with advanced nodes (5nm and below) required.
• Good programming knowledge in Unix, Shell scripting, perl and importantly TCL
• Strong customer-facing communication and problem solving skills
• Strong personal drive for continuous learning and expanding professional skill sets
• Excellent verbal and written communication skills
• Familiar with EDA tool: Characterization: Liberate, Liberate MX, Liberate AMS Simulators: Spectre, AMS, Xcelium Digital: Genus, Innovus, Tempus, Voltus, PrimeTime etc

Responsibilities

• Leading customer engagements on standard cell library optimization and RTL->GDS enablement, including techLEF creation and updates, mapping files, and general flow development.
• Interfacing with customers regarding digital flow enablement and methodologies, including: timing characterization, including sensitivity modeling, Physical view generation (LEF, GDS, abstracts, etc) Logical view generation (LIB, CDL, Spectre, etc) Technology LEF creation for digital tools MSOA flows
• Performing design of experiments and running Genus/Innovus to validate techLEF correctness and library performance and DRC correctness
• Tempus timing flow development and validation
• Working closely with R&D on tools and methodology improvements
• Other digital P&R tasks as needed by the group

Benefits

• You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
• Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
• Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees